PCBs (Part 2)

Part 1, 2, 3, 4

Let’s exercise the tip and tricks that I shared with you in my latest post. Here are the requirements for this subject:


As a one idea per minute person, it was hard for me to stick to one project and one design. However, I had in mind the project of building an advanced Direct Digital Synthesizer  (DDS), some sort of an improved (much improved) version of some early projects. This prototype is a real proof of concept prototype. Instead of building it on a bread board, I decided to go for a PCB from scratch. Here are the three good reasons to do so:

  1. All sections from the circuit are well known or have been individually and successfully tested; the inverter is a charge pump thus creating no CEM troubles
  2. The mix of power supplies, digital and analog sections, the use of long component and wiring paths may create noisy signals and degrade the performances of the DDS
  3. PCB’s are getting cheaper and available quickly without the burden of making them yourself. We’ll get back to this point in the next posts.

Cad tool:

Kicad, version v4.0.7. Althought Kicad v5 is available, I decided to go for the stable version.


This project must contain a variety of sections (analog, digital, power supply) and components such as SMDs, through holes components, Non Plated Through Holes, headers. As this DDS will be driven by an Arduino UNO board, the PCB will have this unique shield shape.


This DDS features both digital and analog sections which tracks shall be separated. The power supply section features an inverter in order to allow -5 V to +5 V output signal swing thus requiring clean power supply “buses”. Care shall be taken to the position of headers and keepout areas (e.g. Arduino UNO USB connector).


Next picture illustrates the components placement on the shield:

All active components are oriented in the same direction (pin 1 pointing the upper right corner of the board), same story for the polarized capacitors.

All components are regularly spaced and labelled as shown below

Next pictures illustrate the copper layers (Top and Bottom) of the shield:

On the top left are the DAC and digital potentiometers, all SPI, thus their location near PORTB. Beneath is the analog section that includes the operational amplifiers and below is the power supply section. The analog potentiometers and push buttons are located on the right and side.

Note: Although this DDS is planned to be digitally driven, I made provision for analog pots and push buttons in order to offer a dual user interface, both analog and digital. Under these conditions, analog pot positions shall be read and converted to digital for further frequency, amplitude and offset control.

From this picture, you can see that all tracks are shielded and kept as short as possible. Tests points are regrouped as much as possible (bottom left, upper left and upper mid area).

See how bottom tracks are arranged: power supply and analog signal tracks are almost all vertical in order to prevent a spaghetti PCB.

On the other hand, the SPI buses are horizontal. As shown in the picture below, the Chip Select lines from the SPI components are not isolated as they carry low frequency digital signals while the MOSI and CLK lines are isolated as they carry higher frequency signals.

A careful look at the tracks shows that the rule “one pad one track” is mostly respected. Vias are placed as far as possible from the pads in order to prevent thermal bridges as shown in the picture below.

Check also the presence of thermal reliefs for grounded pads. In this way, soldering is made easier and safer (for the components) as less heat must be applied to the pads in order to achieve the appropriate soldering temperature.

Last but not least, both copper sides feature large ground planes. Thanks to clean routing, and moderate components density, no copper-less islands were created thus no extra vias were needed.

If you need to pour copper in such island, this is how to create vias on Kicad: create a “via” module (typically plated through hole, inner diameter: 0.3 mm, outer ring diameter: 0.6 mm). Place the module at the convenient place (both sides at the same electrical potential). Right click on the pad, edit “Pad 1” (do not edit the entire module) and set the proper “Net name” (e.g. GND).

Note: Such vias will be flushed if you reload the Netfile using the “Delete” “extra footprints”. To prevent this, create a via component, add it to the schematics and link the component to the module.

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